1. Field of the Invention
The present invention relates to a digital modulation and demodulation scheme for radio communications between a terminal and a base station such as those of the mobile communication, and more particularly, to a digital modulation and demodulation scheme for radio communications which is robust against variation of receiving signal strength due to fading and capable of reducing occurrences of errors.
2. Description of the Background Art
There are various known schemes for digital modulation and demodulation for radio communications between a terminal and a base station such as those of the mobile communication, and the M-ary modulation and demodulation scheme using orthogonal codes is one such scheme which is attracting much attentions recently.
FIG. 1 shows a configuration of a conventional M-ary modulation and demodulation system, which comprises an M-ary encoder 101, a PSK (Phase Shift Keying) modulator 102, a synchronous detector 103, and an M-ary decoder 104. Digital signals entered at a modulation input terminal are divided into blocks of L bits size each (where L is a natural number greater than 1) in advance such that each L bits data series can be regarded as an L bits code, and the M-ary encoder 101 generates orthogonal codes of M=2L bits length each which are uniquely defined with respect to respective codes. For example, in an exemplary case of L=2 shown in FIG. 2, M=4 so that 2 bits (a1, a2) of the entered data are converted into one of the 4 bits length orthogonal codes C1 to C4 according to a conversion rule shown in FIG. 2, and then outputted. The PSK modulator 102 applies the bi-phase shift keying (BPSK) to a carrier by using this orthogonal code. At the receiving side, a signal is detected by the synchronous detector 103, and the M-ary decoder 104 calculates cross-correlation value by multiplying the detected signal with each one of the four possible orthogonal codes C1 to C4, and determines the orthogonal code with the highest cross-correlation value as a received signal. In addition, the M-ary decoder 104 outputs 2 bits of the original data corresponding to the determined orthogonal code according to the conversion rule shown in FIG. 2.
As is well known, biorthogonal codes can be used instead of ordinary orthogonal codes, and M=2Lxe2x88x921 (Lxe2x89xa73) in the case of using biorthogonal codes.
In the M-ary modulation and demodulation scheme, mutually orthogonal codes are used for different input data so that the cross-correlation between signals becomes zero, and therefore it has a characteristic of having a small interference in the identical channel. This characteristic makes it convenient as a modulation and demodulation scheme in the case of multiplexing a plurality of signals at the identical frequency as in the CDMA (Code Division Multiple Access) scheme.
However, in the mobile communication environment, in general, bursty errors occur due to thermal noise and abrupt carrier phase rotation that are caused by frequent dropping of receiving power due to fading. FIG. 3 shows a situation of an occurrence of an error due to fading in the example (L=2) shown in FIG. 2. In FIG. 3, when a time Tf of receiving power dropping due to fading extends over a plurality of bits, the orthogonal code that encountered this receiving power dropping due to fading (which appear shaded in FIG. 3) is difficult to detect using the correlation because of thermal noise, and therefore it has a higher probability of being decoded erroneously as another orthogonal code, and when such an erroneous decoding occurs, the bursty error of about L bits length will be caused.
Thus the conventional M-ary modulation and demodulation scheme has been associated with the problem that the bursty error is caused by the receiving power dropping due to fading.
Next, the operation of a decoder in the conventional modulation and demodulation system will be described in further detail.
FIG. 4 shows a configuration of a transmitting side of the conventional modulation and demodulation system. Here, it is assumed that orthogonal code generators 203-1 to 203-4 employ 4-ary orthogonal codes obtained from 4xc3x974 Hadamard matrix, and therefore a shift register 202 stores data in 2 bits length. It is also assumed that a frequency modulator 205 employs the 4-valued frequency modulation (G=2, 2G=4).
In FIG. 4, the input data entered from an input terminal 201 is stored in the shift register 202. When the input data in a prescribed length of 2 bits (a1, a2) is stored in the shift register 202, a processor 204 reads lout these bits from the shift register 202, selects a corresponding one of the orthogonal code generators 203-1 to 203-4 according to a conversion rule shown in FIG. 5, and outputs a bit sequence outputted from the selected orthogonal code generator to the frequency modulator 205. Then, the frequency modulator 205 converts the entered 2 bits (b1, b2) or (b3, b4) into 4-valued symbols (S1, S2, S3, S4) because G=2, and outputs four frequencies (xcfx89cxc2x1xcfx891, xcfx89cxc2x1xcfx892, where xcfx89c is the carrier frequency) corresponding to these four symbol values, which are transmitted from an antenna 205a. The relationship between the input bits, the 4-valued symbols and the transmission frequencies in this case is shown in FIG. 6.
FIG. 7 shows a configuration of a receiving side of the conventional modulation and demodulation system. The desired radio signals received at a reception unit 211 are entered into four band-pass filters 212-1 to 212-4 having the central frequencies ranging from xcfx89c+xcfx892 to xcfx89cxe2x88x92xcfx892. Each band-pass filter outputs only a signal having a frequency component in a prescribed bandwidth. The output signals of the band-pass filters are entered into corresponding envelope detectors 213-1 to 213-4, where voltage values or power values of the signals are obtained. Here, it is assumed that the voltage values are to be obtained, and the voltage values obtained in correspondence to the symbols (S1, S2, S3, S4) will be denoted as (e1, e2, e3, e4).
These voltage values are entered into a code judgement device 214, where the symbol with the largest voltage value among four voltage values entered therein is selected, and bits corresponding to the selected symbol are obtained according to a correspondence table shown in FIG. 6. The obtained bits are then multiplied with output bits of orthogonal code generators 223-1 to 223-4 at multiplexers 224-1 to 224-4 and entered into integrators 215-1 to 215-4. These integrators integrate the entered values over a transmission time required for 2 bits that are stored into the shift register at the transmitting side, and enters the obtained values into a decoding unit 216. This decoding unit 216 selects one input with the largest value among the four inputs, obtains 2 bits corresponding to one of the orthogonal code generators 223-1 to 223-4 that is used in multiplication of that input, and outputs these bits at an output terminal 217.
In this conventional decoder, there is a problem in that the code judgement device 214 converts the entered values into bit sequences once so that the output signals of the envelope detectors 213-1 to 213-4 cannot be directly utilized at the decoder 216 and consequently not much coding gain can be obtained.
It is therefore an object of the present invention to provide a digital modulation and demodulation scheme for radio communications which is capable of reducing errors due to fading while maintaining the characteristic of the M-ary modulation and demodulation scheme that it is robust against interferences.
It is another object of the present invention to provide a decoder for decoding orthogonal codes which is capable of realizing high quality signal transmission in the mobile communication that involves fading and which is therefore suitable for use in the digital modulation and demodulation scheme of the present invention.
According to one aspect of the present invention there is provided a digital modulation and demodulation system for radio communications, comprising: a transmitting side device having: a division unit for dividing transmission data in advance, into blocks of LN bits length each, where L and N are natural number greater than one, and dividing each block into N sets of L bits data sequences; an encoding unit for generating orthogonal codes of M bits length each, where M is a natural number, which are uniquely defined with respect to L bits codes given by the L bits data sequences obtained by the division unit; a multiplexing unit for multiplexing N sets of orthogonal codes generated by the encoding unit for each block into a multiplexed signal, such that M bits constituting each orthogonal code are dispersed in time in the multiplexed signal; and a modulation unit for applying a digital modulation to a carrier using the multiplexed signal obtained by the-multiplexing unit; and a receiving side device having: a detection unit for obtaining a detection output of signals received from the transmitting side, a separation unit for setting the detection output obtained by the detection unit into reception data-units of NM bits length each in synchronization with multiplexing applied at the transmitting side, and separating each reception data-unit into N sets of M bits sequences; a decoder for obtaining a correlation between each M bits sequence obtained by the separation unit and every possible orthogonal code defined at the transmitting side device, selecting one orthogonal code with a highest correlation, and outputting an L bits data sequence corresponding to each selected orthogonal code; and a composition unit for recovering an original LN bits signal by applying an inverse operation of an operation applied at the transmitting side device, with respect to N sets of L bits data sequences outputted by the decoder for each reception data-unit.
According to another aspect of the present invention there is provided a method of digital modulation and demodulation for radio communications, comprising the steps of: (a) dividing transmission data in advance, into blocks of LN bits length each, where L and N are natural number greater than one, and dividing each block into N sets of L bits data sequences, at a transmitting side; (b) generating orthogonal codes of M bits length each, where M is a natural number, which are uniquely defined with respect to L bits codes given by the L bits data sequences obtained by the step (a), at the transmitting side; (c) multiplexing N sets of orthogonal codes generated by the step (b) for each block into a multiplexed signal, such that M bits constituting each orthogonal code are dispersed in time in the multiplexed signal, at the transmitting side; (d) applying a digital modulation to a carrier using the multiplexed signal obtained by the step (c), at the transmitting side; (e) obtaining a detection output of signals received from the transmitting side, at a receiving side; (f) setting the detection output obtained by the step (e) into reception data-units of NM bits length each in synchronization with multiplexing applied at the transmitting side, and separating each reception data-unit into N sets of M bits sequences, at the receiving side; (g) obtaining a correlation between each M bits sequence obtained by the step (f) and every possible orthogonal code defined at the transmitting side, selecting one orthogonal code with a highest correlation, and outputting an L bits data sequence corresponding to each selected orthogonal code, at the receiving side; and (h) recovering an original LN bits signal by applying an inverse operation of an operation applied at the transmitting side, with respect to N sets of L bits data sequences outputted by the step (g) for each reception data-unit, at the receiving side.
Other features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings.